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1: Select the HDL of your choice either VHDL or Verilog
2: Enter your HDL code for entiy (module) description
3: Select appropriate test-patterns to input as per your test-case
1: Download your test-bench and ready to use is for simulation
Test-Bench Units - The term Test Bench Units is defined as number of times you can process your HDL modules to generate test benches. You need to buy these units in advance depending on your requirement. With every single use, these units are decremented till 0 units left in balance. At the time of registeration, the test-bench unit balance is 0.
Single test bench - As the erm describe you can opt paying and downloading for only one test-bench that you create for your HDL module. Here you don't need test-bench units in balance.